Re: [oc] MAC FIR problem

[aska_chage@hotmail.com]

hi, 095204650580 and marco

i have also problem in the MAC module using ISE 4 from xilinx. The VHDL 
code can be synthesized, however, the testbench does not allow the 
use of negative number in the simulation

I declared: data_in : in INTEGER range -1 to 1;

when i enter -1 in the tbw waveform, it complains about the bit not 
being long enough: "-1 requires 3 bit"

how do i solve this problem and if the RTL is needed, how can i 
translate this into RTL one (i dont know anything abt RTL description)

thanks a million in advance

chris

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