Mail Index

• Thread Index

• RE: [oc] legality of cores?!
  • From: Jeffrey Hanoch <jeff@lowrance.com>
• [oc] legality of cores?!
  • From: Jim Poder <Jim.Poder@wireless-networks.com>
• [oc] call for new project [Modular Multiplication Core]
  • From: 96013 Ahmad Bagus Maskula <bagus@students.ee.itb.ac.id>
• Re: [oc] How can I add my project to opencores
  • From: "Damjan Lampret" <lampret@opencores.org>
• [oc] How can I add my project to opencores
  • From: ssy8793 <ssy8793@sina.com>
• [oc] call for new project [Modular Multiplication Core]
  • From: "ahmad bagus" <ahmad_bagus@hotmail.com>
• [oc] (sans sujet)
  • From: XGuillot@aol.com
• [oc] USB Function Core & Projects page change
  • From: Rudolf Usselmann <rudi@asics.ws>
• [oc] nnARM: An ARM compatible soft core that can synthesis
  • From: "ssy" <skli@nudt.edu.cn>
• [oc] uart16550 core updated
  • From: jacob.gorban@flextronicssemi.com
• [oc] Free registration of global yellow pages.
  • From: info@webb2e.com
• [oc] Hi..take you a little time.
  • From: Jasper Huang <JasperHuang@via.com.tw>
• [oc] prelminary vhdl guidlines
  • From: Jamil Khatib <jamilkhatib75@yahoo.com>
• [oc] VGA/LCD Core
  • From: Richard Herveille <richard@asics.ws>
• No Subject
  • From: "Rocky" <trekker@263.net>
• Re: [oc] VHDL master
  • From: Nitin Bidikar <nitin52@yahoo.com>
• [oc] VHDL master
  • From: "yasser khedr" <ymkhedr@hotmail.com>
• [oc] MMU
  • From: cdrom <cdrom@mail.primorye.ru>
• [oc] AC97 Controller DONE !
  • From: Rudolf Usselmann <rudi@asics.ws>
• [oc] New release of OpenTech cdrom
  • From: Jamil Khatib <jamilkhatib75@yahoo.com>
• No Subject
  • From: "Igor Mohor (uni-mb)" <igor.mohor@uni-mb.si>
• [oc] Motorola 68k wishbone master
  • From: Daniel Haensse <daniel.haensse@alumni.ethz.ch>
• [oc] Header file
  • From: "Igor Mohor (uni-mb)" <igor.mohor@uni-mb.si>
• [oc] New release of the uart16550 core is available on the CVS tree
  • From: jacob.gorban@flextronicssemi.com
• Re: [oc] HDL coding guidelines
  • From: Patrick Schulz <schulz@uni-mannheim.de>
• Re: [oc] HDL coding guidelines
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [oc] HDL coding guidelines
  • From: "Damjan Lampret" <lampret@opencores.org>
• RE: [oc] HDL coding guidelines
  • From: "Illan Glasner" <iglasner@zumanetworks.com>
• Re: [oc] headers for HDL files
  • From: "Damjan Lampret" <lampret@opencores.org>
• RE: [oc] headers for HDL files
  • From: Jamil Khatib <jamilkhatib75@yahoo.com>
• Re: [oc] HDL coding guidelines
  • From: Jamil Khatib <jamilkhatib75@yahoo.com>
• RE: [oc] headers for HDL files
  • From: Woody Johnson <WoodyJ@pptvision.com>
• [oc] headers for HDL files
  • From: "Damjan Lampret" <lampret@opencores.org>
• [oc] Hello
  • From: Anand <anacharya@yahoo.com>
• [oc] HDL coding guidelines
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [oc] Finished projects
  • From: Richard Herveille <richard@asics.ws>
• [oc] Finished projects
  • From: Miha Lampret <mlampret@opencores.org>
• [oc] Question
  • From: "lvxiaoliang" <lvxiaoliang@263.net>
• [oc] Advanced Memory Controller DONE !
  • From: Rudolf Usselmann <rudi@asics.ws>
• [oc] 16550 compatible UART core added to OpenCores CVS tree.
  • From: jacob.gorban@flextronicssemi.com
• [oc] AC 97 Controller Speciviation Now Available
  • From: Rudolf Usselmann <rudi@asics.ws>
• [oc] 24hr customer support 13162
  • From: stacy__l@rokin.com
• [oc] Sender: owner-cores@opencores.org
  • From: Martin Popovici <progisoft@yahoo.com>
• Re: [oc] Verilog Preprocessor
  • From: Steve Wilson <stevew@intrinsix.com>
• Re: [oc] Verilog Preprocessor
  • From: Johan Rydberg <johan.rydberg@netinsight.se>
• [oc] This is not spam. You placed this request on my FFA links page. 6200
  • From: conferencing@swg.co.kr
• Re: [oc] Verilog Preprocessor
  • From: Rudolf Usselmann <rudi@asics.ws>
• Re: [oc] Verilog Preprocessor
  • From: Lawrence Butcher <Lawrence.Butcher@Sun.COM>
• Re: [oc] Verilog Preprocessor
  • From: Lawrence Butcher <Lawrence.Butcher@Sun.COM>
• [oc] Verilog Preprocessor
  • From: Rudolf Usselmann <rudi@asics.ws>
• Re: [oc] Fw: opencores web
  • From: Marko Mlinar <markom@opencores.org>
• [oc] Fw: opencores web
  • From: "Damjan Lampret" <lampret@opencores.org>
• Re: [oc] Fw: UART
  • From: Lichen Wang <lwang1@ix.netcom.com>
• Re: [oc] Fw: UART
  • From: Lichen Wang <lwang1@ix.netcom.com>
• Re: [oc] Fw: UART
  • From: "Ovidiu Lupas" <olupas@opencores.org>
• Re: [oc] Fw: UART
  • From: Ganesh Venkataraman <gxv@cypress.com>
• Re: [oc] (sans sujet)
  • From: Richard Herveille <richard@asics.ws>
• [oc] (sans sujet)
  • From: XGuillot@aol.com
• [oc] AC97 Controller
  • From: Rudolf Usselmann <rudi@asics.ws>
• [oc] Fw: UART
  • From: "Lichen Wang" <lwang@actisys.com>
• [oc] RFR: FPGA Programming:
  • From: Alan Grimes <alangrimes@starpower.net>
• No Subject
  • From: "Hazime, Bilal" <bhazime@harris.com>
• [oc] new logo
  • From: "Marko Mlinar" <Marko.Mlinar@campus.fri.uni-lj.si>
• [oc] remove
  • From: henk.vrielink@philips.com
• [oc] PCI bridge project status
  • From: "Miha Dolenc" <mihapci@email.si>
• Re: [oc] how to download sdram ?
  • From: Miha Lampret <mlampret@opencores.org>
• [oc] how to download sdram ?
  • From: =?ks_c_5601-1987?B?w9bBvsL5?= <cjc@srcappliance.com>