Re: [oc] Beyond Transmeta...

[Marko Mlinar <markom@opencores.org>]

> There are a lot of unknowns here so don't be so quick to assume anything
> about power consumption. A general rule of thumb though is if you can
> generate the same result with less work you will consume less power.
Yes, it is too early to speak of power consumption. However, I think that 
current designs have reached very low power consumption (not just because of 
technology!), and it will be very hard to do it better. In your case, for 
example, you will need more control logic per bit that conventional CPUs,
you will need also bigger caches, since you have more fine grained executions, 
etc. Maybe I have some sort of mental barrier, but I don't find it as 
straightforward as you do.

> > But even when leaving aside the implementation issues, you have will
> > problems with loops, function calls and sw model, especially with PLD
> > idea.
>
> Why think in terms of loops and function calls? Go out of the box.
> Start with a clean sheet of paper.
Ok, I would agree, that function calls can be cutted out.
But loops? I don't think so. Loops are actually a way of dinamically 
duplicating pieces of code/logic. You need some sort of "loops". AFAIK, there 
are only FSMs and stack based loops (similar to recursion).
In both cases you have mentioned problems of communication.

> > There is also problem of debugging.
>
> Initial debugging would be done through emulation. Not unlike what you do
> now (synthesys). When the routing is proven then it would be incorporated
> into the larger project and tested again.
ok, I think that would work for 90% of applications.

Anyway, continue the good work, I would be very happy if I cound work on 
something not Von Neumann for a change ;)
On the other hand I find it a waste to throw all accumulated SW away, just 
because of new CPU design ;)

best regards,
Marko

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