Re: [oc] Output loading in digital circuit

[Richard Herveille <richard@asics.ws>]

>Hi all guys
>
>I am a digital circuit designer. However, I am always confusing why
>in the datasheet spec, there're output loading with different values.
>Say 50pF and 500ohm in parallel with the output.


Euh just a guess; it's an impedance ?!

Try simulating the circuit with spice, or similar. And leave either the 
capacitor or the resistor out of the equations. Actually it should feature 
a small induction too.

Watch and shiver .....

Richard



>Can anyone suggest why it's the case ? And how to analyse this ?
>
>Thanks
>kenneth
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