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Re: [oc] CRC32 speed



Thanks for your help.

Since the crctool on easics's website does not allow me to change the msb
index of the data and crc, I decided to write a script myself to do that. I
just checked in the script
(http://www.opencores.org/cvsweb.shtml/firewire/bin/gencrc.pl), which has
two switches to change the index of the msb of the crc and data. Please let
me know any problems.

Thanks,
Jim

----- Original Message -----
From: "Allan Herriman" <allan_herriman.hates.spam@agilent.com>
To: <cores@opencores.org>
Sent: Sunday, March 17, 2002 11:04 PM
Subject: Re: [oc] CRC32 speed


Johnsonw10 wrote:
> Does anybody know how fast 32-bit CRC-32 logic can run on an FPGA? I'd
> appreciate any info so that I can decide to use an 8-bit CRC-32 or a
32-bit
> CRC-32.

In Virtex-2, we get over 200MHz.  So you can do about 6.4Gbps with 32
bit, or about 1.6Gbps with 8 bit.

Or > 10Gbps with 64 bit.  Or even faster with wider buses, because the
part of the CRC calculation that XORs the bus width down to 32 bits
isn't in the feedback path and can be pipelined as much as you want.

You might like to read this news:comp.arch.fpga thread:
http://groups.google.com/groups?threadm=3c0b6477.24735678%40netnews.agilent.
com

Regards,
Allan.
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