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Re: [oc] I2C slave model

To: cores@opencores.org
Subject: Re: [oc] I2C slave model
From: Richard Herveille <richard@asics.ws>
Date: Thu, 14 Mar 2002 14:09:22 +0100
In-Reply-To: <20020314093531.GD26876@wattle.taudelt>
References: <5.0.2.1.2.20020314060546.00a88558@asics.ws><200203131139.MAA08932@iza.mr2.si><5.0.2.1.2.20020314060546.00a88558@asics.ws>
Reply-To: cores@opencores.org
Sender: owner-cores@opencores.org



Races in a model are never good. If you've fixed them and verified them 
please send them to me and I will upload them and replace the older model.

Richard



>agree that the i2c verilog slave model does drive ack. but there is
>the odd race in the model, as I noted a while back. What do I do with the
>fixes?   The current one does not work with several simulators I tried.y
>
>john
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References:
- Re: [oc] I2C slave model
  - From: Richard Herveille <richard@asics.ws>
- Re: [oc] I2C slave model
  - From: vikasakalwadi@rediffmail.com
- Re: [oc] I2C slave model
  - From: John Sheahan <jrsheahan@optushome.com.au>

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