RE: [oc] FPGA/ASIC Design Kits

["Morris, Scott J" <morris.scott@pnl.gov>]

I don't know about Xilinx parts but with Quicklogic the larger the number the faster they are. 

 

-----Original Message-----
From: Liao Choon Way [mailto:scriabin@pacific.net.sg]
Sent: Wednesday, December 12, 2001 4:46 AM
To: cores@opencores.org
Subject: RE: [oc] FPGA/ASIC Design Kits

I thought the -5 rating means that the clock period is 5ns, so the theoretical max clock speed is 200MHz? (usually for dev boards they give you the best rated device since they don't save on volume anyway)

So.. for the -6 would be 166 MHz

-7 would be 142MHz

-8 would be 125MHz

 

Note the word theoretical - depending on your design you might need to lower the clock speed to meet timing specs. As for the 100MHz DDR SDRAM controller operating at 166 MHz... it might be possible if you have some asynchronous circuits and play some tricks, but I'm not really that familiar with the DDR standard.

 

As for the SDRAM at 133MHz, using a -5 device, I don't really see why not...

-----Original Message-----
From: owner-cores@opencores.org [mailto:owner-cores@opencores.org]On Behalf Of Paul McFeeters
Sent: Wednesday, December 12, 2001 6:30 PM
To: cores@opencores.org
Subject: RE: [oc] FPGA/ASIC Design Kits

Mohammed,

 

I use two B5-Spartan2+ boards from Tony Burch in Australia. They have worked flawlessly so far.

 

You have to work out a few things before you pick a board.

 

1. Speed of device required if you wish to run it fast say 100+ mhz, some boards use -5 devices which are

slower than -6 so be careful on this one. I think there are -7 devices and maybe -8 out but I've not really

bothered with them as my -5 device boards run sweet at full 100mhz so I'm happy (for now).

 

2. The number of I/O pins you require to be able to connect to. Some boards bring all the pins from the FPGA

out to headers, some do just the I/O and Power pins whilst some just give you a token few to play with.

 

3. The amount of gates in the device. Most boards feature a 200K gate FPGA now so this should do any new

designs unless you are planning a huge complex HDL design?

 

4. Also be careful about how the boards need to be programmed, some of them require you to buy a special

cable which can cost $100+ just for the cable!

 

I would recommend looking at the following for good quality 'learner boards'

(http://www.xess.com)

(http://www.burched.com.au/bedspartan2.html)

 

There are boards available for the faster, more I/O pins or more gate count FPGAs but the price increases

when your requirements do.

 

Paul

 

PS Does anybody know offhand just what max speed a -5 is supposed to be able to do. I don't imagine putting the

100mhz clock into a x2 DLL and then running off this will be too likely to succeed! But I would like to know for

future reference, I'm too busy to sit  and download all the Spartan2 manuals off the Xilinx site. ;-)

I have seen the DDR SDRAM controller is recommended to use a -6 spec FPGA but it didn't give anymore details.

Can a -5 do a 133mhz SDRAM interface or would I be limited to 100mhz version?

-----Original Message-----
From: owner-cores@opencores.org [mailto:owner-cores@opencores.org]On Behalf Of Mohammed El Shoukry
Sent: 11 December 2001 20:07
To: cores@opencores.org
Subject: [oc] FPGA/ASIC Design Kits

Sorry Guys I'm new to this but I want to get on track as fast as possible.

what kind of Kits would you use for trying and testing your designs for ASIC or FPGA, ofcourse you don't go to the foundry for each new idea ?

Paul ?