Re: [oc] Beyond Transmeta...

["Marko Mlinar" <Marko.Mlinar@campus.fri.uni-lj.si>]

> Each logic cell could have a queue from which configuration data
> ("instructions") are read.  These queues could be preloaded with a static
> program.  Alternatively, the outputs of the logic blocks could be
connected
> to the inputs to the queues.   One could imagine programming a portion
> of the FPGA with a compiler program (gcc?).  This would then generate
> instructions which are executed by some other portion of the FPGA. (Note
> all sections fo the FPGA are identical in that they are just logic
blocks.)
> The result would be an FPGA that can execute a C (or insert your preferred
> language) program!
Yes, this could be done by GCC. But there is still a large problem how to
load program in (huge amounts) and the second problem is:
when program is loaded (and connections are established?) this net. is
relatively static. This is unsuitable for desktop aplications, but very
suitable
for DSP ones. Desktop aplications change program very often. The only
solution would be if you could have _all_ program loaded.

> Routing may be an issue.  In an FPGA not every logic block can communicate
> with every other logic block.  An analogy with a traditional CPU would be
> that an operation on memory location 'x' can only involve memory
> cells in the range 'x-n' to 'x+m'.  Assembly language would be a
nightmare,
> but a smart compiler could hide this limitation from the user.  I would
> not like to be the programmer porting the first compiler to the chip!
Then
> again, it would be a really interesting project.
The compiler for this thing ist't a problem, if this could be realised and
would
be fast.

Marko