Re: [oc] Adder issues ?

[Rudolf Usselmann <rudi@asics.ws>]

On Thu, 2003-04-24 at 15:40, NansonHuang@ITRI.ORG.TW wrote:
>   Hi, dear elites,
> 
>   I had a question about the adder implementation in RTL. Provided that we
> use 2's
> complement system as the number representation, 2 variable adder is
> normally written
> as c=a+b which c is 12 bits, a and b are 11 bits. We denote the area
> occupation of the  2 variable adder is X gates. Now if we would like to
> implement the function such as c=a+ 11'h001(a constant) or the negation of
> a, -a(i.e ~a+1'b1), do we code that as the above coding style c=a+11'h001
> in the RTL ? Will the synthesizer optimize it instead of area occupation X

Usually it doesn't really matter how you write it. As long
as the synthesis tool can recognize one of the variables as
a constant it will optimize the adder. If the constant works
out to a '1' (only LSB is set), it will typically instantiate
an incrementor.

> (it should be smaller that that)? I think synthesizer like Dc will do that
> job. Do you prefer any implementation methodology to achieve that instead
> of synthesizer in RTL ?
> 
>   BTW, do you recommend any references regarding how remap controller works
> in an embedded system ? I would like to design it and have no any idea just
> discrete materials. In opencores, are there any documentation state it ?
> 
>  Appreciate for your any comments.
> 
>  Regards,
> 
>  Nanson Huang


Regards,
rudi
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