Re: [oc] verilog to vhdl converter

[John Sheahan <jrsheahan@optushome.com.au>]

On Mon, Apr 07, 2003 at 03:26:17PM +0800, Niclas Hedhman wrote:
> On Friday 04 April 2003 18:15, John Sheahan wrote:
> > I recently wrote a perl script for converting synthesizeable
> > verilog to vhdl.
> 
> I don't know how many software programmers are lurking on this list, but I am 
> a rather competent Java/C/assembly programmer, and willing to put in some 
> time to help out. Perl is not my game, but I think I would be able to 
> translate to Java, and make a web service out of it (if interest).
> 
> Niclas

as a hardware guy, I don't claim to any sw sophistication so I stick 
to interpreted lanugages or assembler.

I'd actually prefer to see effort into completeness and correctness
than language style first though.  But as a 1300 line perl script
its not a thing of beauty. 

I'll have another look at geda  or do something about an external web
page here. I'll post a link in a couple of days. else nag me.

john
 


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