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[oc] Need some Help..

Hi List,


I want to do the following things in vhdl.


I have in my Tesbench the following signal.

   Type Memory is array 0 to 16 od REAL;
   signal index : Memory;


And I want to initialized this Memory array with an external file in
witch there are some Real parametres.

Some body can tell me how to write the process to do this.

I'm not very familiar with read files function in VHDL.



Thanks a lot in advance.


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