Re: [oc] VHDL PID Motor Controller

[jose_phla@hotmail.com]

Hello,

can you help to send the link of "the site of Federal Institute of 
Technology in Zürich" ?

Thanks


----- Original Message ----- 
From: Jean Masson <Jean.Masson@l... > 
To: cores@o...  
Date: Wed, 30 Jan 2002 17:43:14 +0100 
Subject: Re: [oc] VHDL PID Motor Controller 

> 
> 
> Hello Josh, 
> 
> I have not implemented a PID system in FPGA, but the system is 
> basicaly an ALU, with a multiplier 
> (MAC of DSPs). 
> You can use elements for arithmetic treatments : adder, shifter, 
> multiplier (Brown or Boothe 
> cellular structure) : 
> P, is a multiplier by a constant. I, is an adder (integration) with 
> multiply and D, is a 
> substractor (time derivative) with 
> perhaps multiply. 
> 
> A good source is the site of Federal Institute of Technology in 
> Zürich (CH), Dr. Zimmermann has 
> done implementation 
> of a great number of arithmetic subsystems, in VHDL. His tutorial 
> on binary arithmetic is also 
> excellent. 
> 
> If you have enough room on your Virtex, a pipe-line architecture, 
> with a one PID evaluation by 
> clock cycle, is feasible. 
> This is an excellent student project thema, that I keep in mind ! 
> 
> It remains one question, is Virtex cheaper, better, or faster than, 
> says, 3 pipe-lined DSPs SHARC 
> for the same performance ? 
> Did you think that a 100 MHz PID evaluations for a motor speed 
> control is realy necessary ? No over 
> killing... 
> I perform motor speed control with a simple Cygnal system, and 8051 
> code (12 bits of ADC and DAC) 
> with a pulse 
> tachymeter. 
> 
> Best regards, 
> 
> Jean MASSON 
> 
--
To unsubscribe from cores mailing list please visit http://www.opencores.org/mailinglists.shtml