Re: [oc] FPGA forum

[John Dalton <johnd@southern-poro.com>]

Hmmm. Let's see.  A typical 1M gate FPGA with around 60000 states
implemented as a LUT in an SSRAM.  That'll be around 60000*(2^60000) bits.
Ooops.  Just ran out of electons in the universe Rudi!  Looks like
256GB was a bit of an underestimate!  :-)

On a more serious note, it does drive home just how complex a
million gate design can be, without a modular approach.

Rudolf Usselmann wrote:

> I still think the best FPGA is a 256Gbyte SSRAM with 2nS prop delay ;*)
>
> rudi