Re: [oc] Modular FPGA board

[Marco Antonio Simon dal Poz <mdalpoz@lsi.usp.br>]

On Fri, 24 Nov 2000, John Dalton wrote:

> > My idea was the opposite of your: I was planning to
> > built a board for PCI testing only when the core will be finished.
> 
> My plan is for the PCI hardware to be an FPGA connected directly
> to a PCI connector.  There would also be a bunch of pins going off to the
> main FPGA.  The only questions are:
> 1) How big an FPGA do you need, and

It depends on the frequency (33 or 66MHz) and the bus width (32 or 64
bits).

> 2) How many pins do you need to communicate with the main FPGA?

It depends on the bus width. For safety, 100 pins.

> An answer to question 1) is not too important, as within a
> family it is possible to get different sized FPGAs with a common footprint.

There is not too many different FPGAs in TQFP packet, then the common
footprint should be based on a BGA packet. But if your plan is to build
the PCB at home, BGA is not a good alternative. Or do you have equipment
do solder a BGA chip at home?

> In a way, I think it is a good thing to design the PCI core and the hardware
> at the same time.  This forces the hardware and core to be independent,
> leading to maximum portability for the core and maximum versatility
> for the hardware.

Yes, the constraints for the hardware are just the electrical
specifications of the PCI standard. If I had the PCI specs, I would try to
design a board, of course after the selection of an FPGA.

> > If a PCI core is validated through simulations and it doesn't work over a
> > specific board, what should I do to detect the problem? Measurements using
> > oscilloscopes and logical analysers are not possible, because they modify
> > the circuit when connected into them due to cable impedances, that
> > generates multiple reflection. Is there any solution?
> 
> Since we are using programmable logic, it should be possible to use
> the system to validate itself.  Simply program a logic analyser into
> the FPGA. One of the initial applications of the Pamette (an FPGA
> board built bt Digital) was to verify the operation of a PCI bus to
> which it was connected.

This requires an FPGA with a huge amount of pins, which is expensive, but
still is an excellent idea. As we are talking about open cores, maybe we
could design a PCI prototyping board with maximum flexibility and maximum
testability, based on an FPGA. I won't suggest a specific FPGA model,
because I don't have PCI specs.

> > I don't think that an FPGA for PCI have to fit in a socket. IMHO, it has
> > to be soldered in a board. And if this board should fit in a SIMM socket,
> > the FPGA has to be a TQFP or BGA packet.
> 
> Agree.  My current thinking is to build the PCI as a separate board,
> with a chip soldered directly to it.  PCI tracks would go directly to
> a PCI connector.  The main logic board and PCI board would be
> plugged into each other.  Unfortunately I don't think a SIMM socket
> is possible due to mechanical constraints.

We can design the board with a PCI edge connector and with all PCI tracks
going from the PCI connector just to the FPGA that will be the PCI core.
Then, the remaining pins of this FPGA would be connected by the board to
the SIMMs sockets. Our specific hardware would be another FPGA soldered in
an extended SIMM board, and maybe, for some applications, one of the
sockets would accept a real SIMM memory module. Is this flexibility good
enough?

> > TO DO AT HOME??? Well, if I understood it right, it is much harder to do
> > the copper lines for the FPGA than for the edge connector.
> 
> Yep.  Do at home.  I'm proposing to use CAD (ideally gpcb, but I don't
> think it is finished) to layout a board, printing it 1:1 then using optical
> means (Riston?) to transfer the design to a PCB.  With careful construction
> it *might* be possible to do a board for a chip with 0.5mm pins at home.
> In my experience, aligning two sides of a board, to a fraction of a mm, is
> difficult to do at home.  Hence it is difficult to do a double sided
> edge connector.  (Single sided is okay.)

Could you please explain what is this Riston? I don't know any home
methods for easily transferring images from papers to copper boards. The
methods used for colored t-shirts are too dirty and doesn't provide enough
resolution. In my experience, if you are able to boards for 0.5mm pin
chips, you are also able to do a good alignment. I am used to use the via
holes for helping the alignment.

> Of course this does not rule out the convenience of paying someone
> to build the board for you.  But it would be nice to cater for all tastes.

If you compare the cost of the board with the cost of the FPGA, you can
see that the board isn't too expensive.

> > Is there any
> > problem if the lines of the edge connector have the right distance and
> > smaller width (ie, increasing the spacing)?
> 
> Probably not a good idea.  Edge connector widths and spacings have
> generally been designed to maximise chances of a good connection
> while minimising chances of a short between contacts.  Changing
> widths could impact reliability.

That's true, but in a home made board, it's too risky to have a short
between contacts, unless you have a CAM equipment (based on a plotter)
that can remove precisely pieces of copper from the board. It's possible
that this kind of tool could also make the alignment of the sides.

But I didn't expect that you were thinking in a home made board because,
in general, PGA and BGA packets requires at least a 3-layer board, and
this can't be home made.

Greetings from Brazil!

	Marco Antonio