Re: [fpu] Architecture

[Jamil Khatib <jamilkhatib75@yahoo.com>]

Vladimir wrote:

> > Do we really need 80 and 128 bit precision? I guess at least for a start
> > single and double precision would be enough. In fact I would put in our
> > first silicon test run (hopefully this will happen at the end of summer)
> > only single precision FPU since I think it is important to have small die
> > (at least for the first silicon). Idea is to be able to "sell" this first
> > implementation chips for a price of a hamburger. ;-)
>
> The IEEE 754 does not insist on implementing double precision but strongly
> recommends that an implementation should support the "extended precision"
> format corresponding to the widest basic. In case of 64-bit double format
> the extended has _at least_ 79 significant bits. For 32-bit single it should
> have _at least_ 43. This policy is needed to support a sequence of
> continuous operations with a little bit higher precision before rounding
> them to the basic format. That is why x87s and later Intel FPUs keep the
> internal representation 80-bit wide. It is easy as long as you use a
> separate register space.
>
> As far as I could understand you want to use double precision because it
> fits well into 64-bit register file. Strictly speaking you may pretend that
> your implementation conforms to IEEE 754 implementing only the single basic
> precision and using double as its extension. You cannot claim to support the
> double precision without implementing the extended format for it.
>
> Vladimir Ushakov

So if we just support  80-bits for internal and intermediate calculations and
not as operands we will not be conformed to IEEE 754 for the double precision,
am I right?.

Is there any specific implementation "algorithm" for all IEEE 754 calculations
and rounding. I think this is important so as to get the same results from all
IEEE 754 fpus.
Jamil Khatib


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