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[pci] ucf file

Good morning everybody,

I'm currently trying to route a board with two X2S200 FG456 FPGAS but the router 
is not able to route all connections. (all pins are used)

My questions are:

Would the core also run in X2S200 PQ208 package?
Has someone a constrains file (ISE 5.2) for this package type?
Does some port need to be connected to specific banks, or
is it OK to connect all ports to pins and the PCI_CLK to a GCLK?
Is it essential to use speed grade 6 instead of 5?

Is there anyone out there who was able to design a board with all pins of 
an FG456 package connected? If so, with which number of layers and which
tack and via width have you used.

Many thanks for your help.

Have a nice day,

Nico.


PS Thanks to "cfk" for the Layout tips. (needed the +/-12V for OPAMPS ;-)


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