RE: [pci] 66Mhz

["Tadej" <tadej@opencores.org>]

Hi!

First I will answer to your question. I synthesised and implemented the
PCI bridge with CRT core in Virtex II -6 speed grade (xc2v1000-bg575-6)
without any mayor optimisations and without synthesis constraints. I used
the ISE 4.2 tool and it managed to meet all timings on input and output
pins, while PCI clock was 86 MHz and the WISHBONE clock was 97 MHz. Both
cores together occupied cca 31% of FPGA.
But the current PCI core is 32-bit. If I understood you well, you changed
OpenCores PCI bridge core to 64-bit? If so, that is GREAT and
congratulations.
I would like to have that core :)
I would put it to OpenCores web page, with you as an author, and share it
with others, as we shared the current 32-bit PCI bridge core.


Best regards,
	Tadej


-----Original Message-----
From: owner-pci@opencores.org [mailto:owner-pci@opencores.org]On Behalf
Of joe.mcdevitt@dtims.com
Sent: 26. september 2002 0:19
To: pci@opencores.org
Subject: [pci] 66Mhz


Howdy all,

I need to develop a PCI card to perform basic functional tests on PCI
busses.  I have already successfully use this core to develop a 64bit,
33Mhz test card and its working great; but I am now being asked to
extend its range to 66Mhz – (perhaps future to PCIX – 100/133Mhz).  Is
this possible in a Xilinx FPGA using this core? If so, what device? (Sorry
for the stupid question but I’m more of a circuit board guy than a VHDL
guru)

If I were to develop a circuit board is there a ‘wish list’ of functionality
it should have?

Joe
--
To unsubscribe from pci mailing list please visit
http://www.opencores.org/mailinglists.shtml


--
To unsubscribe from pci mailing list please visit http://www.opencores.org/mailinglists.shtml