Re: [pci] running run_pci_sim_regr.scr

[cfk <cfk@pacbell.net>]

Dear Ines:
    I dont you want to think anyone is ignoring you. I suspect that you are
following an uncommon path for your simulation. Let me describe my path in
hopes it might be helpful to you.

1) For ModelSIM PE on windows2000 , put all of the files from both the
pci/rtl/verilog and pci/bench/verilog directories in one new directory.

2) Make a project in ModelSIM on windows containing all of the .v, .h & .vh
files.

3) In ModelSIM, load the file system.v and run it for 100us simulation time.

4) Admire functioning simulation.

One of my colleagues has been successful in doing a very similar thing with
Icarus Verilog in Linux with batch files, so I suspect you can get there in
Linux also. I really dont know what to do with the .scr file as I dont have
the same software that Miha has to run this simulation, so I had to go a
different direction, although I can assure you that the simulation does
function.

Charles

----- Original Message -----
From: <ines@vt.edu>
To: <pci@opencores.org>
Sent: Friday, July 26, 2002 1:38 PM
Subject: Re: [pci] running run_pci_sim_regr.scr


> ok., so apprently, it didnt' like the line:  set arg_num = $#; #
> number of arguments in the script.. but now i get other errors
>
> <<<
> <<< Iteration 1
> <<<
>
> \t@@@
> \t@@@ Compiling sources
> \t@@@
>
>
> \t@@@
> \t@@@ Building design hierarchy (elaboration)
> \t@@@
>
>
> \t###
> )": Event not found
>
> I mean, am i doing something wrong? Why isn't this script running
> correctly??
> thanks
> ines
>
>



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