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Re: Re: [pci] about turnaround



Hi Tadej Markovic£¬

full of thanks for giving so detailed description. but i am still wondering who is responsible for keeping shared signals(AD or CBE) stable on PCI bus during turnaround cycle? 

i think since the bus is normally driven most of the time, the precharged bus will retain its state for some time. but if it is right, how long the state can be retained.

regards.

>Hi!
>
>Before entering a turn around cycle, all control signals must be driven to
>inactive state (active HIGH, except for IDSEL, which is driven by one of the
>AD lines during configuration cycles). 
>Additionaly, all control signals except IDSEL require pull-up resistors on
>mother board and not on expansion boards: 
>FRAME, TRDY, IRDY, DEVSEL, STOP, SERR, PERR, LOCK, INTA, INTB, INTC, INTD,
>REQ64 and ACK64. 
>The pint-to-point and shared 32-bit signals do not require pull-ups, bus
>parking ensures their stability. 
>When a 64-bit data path is provided, AD[63..32], CBE[7..4] and PAR64 require
>either pull-up resistors or input "keepers", because they are not used in
>transactions with 32-bit devices.
>
>I hope this helps.
>
>Regards,
>	Tadej
>
>
>On Thu, 28 Mar 2002, you wrote:
>> hi all,
>> 
>> dose turnaround cycle mean that if one signal is in turnaround cycle, no device will enable its OE and drives it on PCI bus.
>> 
>> for instance, in a basic read transaction, after a master drives address on AD , it will enter a turn around cycle. then the master will disable AD OE and stop driving AD. at this cycle, there is no device driving AD. one or two cycle later target will drive data on DATA.
>> 
>> if i am right, who is responsible for keeping signal stable on PCI bus during turnaround cycle? 
>> 
>> i think since the bus is normally driven most of the time, the precharged bus will retain its state for some time. but if it is right, how long the state can be retained.
>> 
>> i really appreciate the help for clarifying the mind.
>> 
>> sumnow
>> 
>> 
>> 
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