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Re: [pci] PCI IP core
Hi!
Yes, I actually mentioned the extended Config Space (I'm sorry, because
there is no clear reference to Device Specific Configuration registers - my
mistake). Registers in this space are all registers of the core (Device).
Yes, a part of this registers are also for image mapping, but there are also
registers for interrupts, error control and two special registers, which are
used for generating the configuration cycles on the PCI bus, but only when
core is configured as PCI host.
At this point, I must say, that there is SHORTER PDF specification (still
the
same revision) on the web, about 660 kB.
Regards, Tadej
----- Original Message -----
From: "Oliver Amft" <oam@gmx.net>
To: <pci@opencores.org>
Cc: <tadej@opencores.org>
Sent: Tuesday, May 22, 2001 10:19 AM
Subject: Re: [pci] PCI IP core
> Hi Tadej, all
>
> I took some time to walk through the project papers in the last few days.
> I didn't find any clear reference to the "Device Specific Configuration
> regiters" you mentioned (maybe I wasn't careful enough); the only thing
I've seen
> is the extended Config Space (figure @ specification page 21) - is it that
> what you meant? BTW: What is the intended use of this space - I assume it
is
> just for the image mapping stuff (PCI Target/Wishbone slave), right?
> Cheers,
> Oliver
>
> P.S. The "image"-thing is fine, thanx for explanation!
>
>
>
> > Regarding the questions, I will first answer on the second one, why
> > is the count (of the "images") limited from 2 to 5 instead of 1 to 6.
> > The maximum number of all "images", as you also mentioned, is 6.
> > Of course you may use none of them or one or all six, but we (I guess
> > we wasn't so clear about this) were thinking, what should this PCI
> > core, we are trying to make, have. 1 image is used to access Device
> > Specific Configuration registers. So there are only 5 images left (that
> > is why 2 to 5). By default, the PCI core should have (it can also be
> > changed) 2 images, but the number is also adjustable to the max of 5.
>
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