Re: [fpu] pipelines & control

[Jamil Khatib <jamilkhatib75@yahoo.com>]

Hi,

--- Damjan Lampret <damjanlampret@yahoo.com> wrote:
> 
> --- Jamil Khatib <jamilkhatib75@yahoo.com> wrote:
> > Hi,
> > 
> > How do you suggest to use the piplined fpu blocks
> and
> > how to control everything via OR1K or without it?
> 
> I suggest most of the FPU is controlled by OR1K. If
> something doesn't
> require OR1K help then it should be done
> automatically inside FPU.
> 

So could you let us know exactly how exactly should I
provide for the FPU. This specifications should be
written in the FPU extrnal interface.


> > 
> > The pipelines will work fine if all instructions
> use
> > the same execution unit but they will be wasted if
> we
> > got instructions the use different execution
> units, do
> > you have any comment on that?
> > 
> 
> Not sure what you mean. If you mean that not all
> executions units will
> be used then this is obvious since you can't always
> issue as much
> instructions as you have execution units.
> 

I mean that each execution unit has 2-3 piplines so to
get the result from the adder you have to wait 3
clocks which will make 3 clocks delay but if you have
3 additions or more you will get overall speedup
because each pipe will calculate part of each
addition.
but if I get three operations (add,mul and div) each
unit will wiat 3 clocks because you can not use all
pipes in them

> > Regarding the other instruction ( not basic) like
> > trigonometric, logarithmeic functions .... do you
> > suggest to implement them using the basic
> execution
> > units (micro programmed)?
> > 
> 
> I don't know. Do you think we need them? I think for
> a start these
> could be first emulated in software with the help of
> basic FP
> operations.

I prefere to have at least some accelerators for some
operations, because they use lot of operations to get
teh result (Sin for example needs to calculate large
poynomial to get teh final result)

> 
> regards,
> Damjan
> 
> PS1 I found out that PentiumIII/Athlon has 4/1 FP
> pipeline depth for FP
> ADD/MUL. 4/1 means latency/throughput.
> PS2 There was a bit of debate about SNANs/QNANs.
> This is mentioned in
> Motorola's ALtiVec (since it also supports single
> precision FP data
> types). See:
>
http://ebus.mot-sps.com/brdata/PDFDB/MICROPROCESSORS/32_BIT/POWERPC/ALTIVEC/M951447886716collateral.pdf
> 

I am going to check it

> 
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