Re: [Re: [pci] Is it a dead project]

[" " <mcjy@my-deja.com>]

Maybe we can speed up the progress
by making some specification more
simple?

I guess a lot of time have been spend
on signal naming convention.  This is
quite a general topic and could be discuss
in VHDL news group.

from
Joe

--

On 24 Feb 00 06:40:52 Asia/T   jamil khatib wrote:
>ovilup@mail.dnttm.ro wrote:
>
>Hi,
>
>> > Is it this another dead project?
>I sure hope not. But, also, depends on you.
>If nobody else is interested, you can do it 
>alone. ;-)
>
>I am very interested in developing such a core,
>but not right now. And, if needed, i will do
>it by myself.
>
>regards,  Ovidiu
>All what I want from you is to give me some feed backs about my comments and I
>can do the work alone. that is because the core will be public and so I need
>comments from all those who may use it, unless I am going to do the work as I
>can see it and then anyone who is going to use he has to modify it.
>
>Jamil Khatib
>
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