Mail Thread Index

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• Re: [oc] AUDIOWAREZ TOP 50 - the only one ;), dr_beatmusic
• [oc] micro sequencer, Jamil Khatib
  • Re: [oc] micro sequencer, Jim Dempsey
  • <Possible follow-up(s)>
  • Re: [oc] micro sequencer, Steven Wilson
• [oc] Video Cards, starz2far
• [oc] Design architecture, akfoo
• [oc] wishlist/todolist, Damjan Lampret
  • RE: [oc] wishlist/todolist, Paul McFeeters
    • Re: [oc] wishlist/todolist, Damjan Lampret
      • Re: [oc] wishlist/todolist, Miha Lampret
• [oc] WORLD WIDE INVESTORS 4 YOU!, KENDYLL
• [oc] how much logic?, rohit kumar
• [oc] My grandfather name is the same as yours, daisy_tadros
  • Re: [oc] My grandfather name is the same as yours, Richard Herveille
• [oc] Too many email, a suggest..., Rami S. F. Tadros
  • Re: [oc] Too many email, a suggest..., Damjan Lampret
• [oc] =?big5?B?pl6rSKFHIFtvY10gSGFwcHkgZGF5cyBhaGVhZCBmb3IgZmxhc2g=?=, mckao
  • [oc] =?Windows-1252?Q?RE:_=5Boc=5D_=A6^=ABH=A1G_=5Boc=5D_Happy_days_ahead_for_?==?Windows-1252?Q?flash?=, Paul McFeeters
  • [oc] =?big5?B?UmU6IFtvY10gpl6rSKFHIFtvY10gSGFwcHkgZGF5cyBhaGVhZCBmb3IgZmxhc2g=?=, Jim Dempsey
• RE: [oc] Handel-C replacement, name is done now for the coding., suja_36
• [oc] EDA tool and help, xavier ordoquy
  • <Possible follow-up(s)>
  • [oc] EDA tool and help, Xavier Ordoquy
    • Re: [oc] EDA tool and help, Marko Mlinar
• [oc] FW: Micro FPGA Board??, =?Big5?B?Qm9tbXkgQ2hlbiCzr7nFs7k=?=
• [oc] INTERNATIONAL EMPLOYMENT, news
• Re: [oc] [pci] PCI models, rfjm
• [oc] FW: The Superheroes of HDL Design, Paul McFeeters
  • Re: [oc] FW: The Superheroes of HDL Design, Jim Dempsey
• [oc] WWW.OPENCORES.ORG, Christine Hall
  • [oc] Now I'm confused, did somebody nuke CLevelDesign.com?, Paul McFeeters
• Re: [oc] C++ to HDLs? Thats fine for breakfast now give me achallenge for lunchtime, Martin.J Thompson
  • RE: [oc] C++ to HDLs? Thats fine for breakfast now give me a challenge for lunchtime, Paul McFeeters
• Re: [oc] MP3 Encoder?, tharishr
  • [oc] oc8051, simon.teran
• RE: [oc] Re: How to create such signal wave using VHDL?, Martin.J Thompson
• [oc] Patent limitations; was I'm laughing so much its hurts,, Wamnet
• Re: [oc] C to HDL? Didn't realise the situation was that bad, jdalton
  • Re: [oc] C to HDL? Didn't realise the situation was that bad, Richard Herveille
  • Re: [oc] C to HDL? Didn't realise the situation was that bad, MICHAEL M DELANEY
    • Re: [oc] C to HDL? Didn't realise the situation was that bad, Michael Ayton
      • Re: [oc] C to HDL? Didn't realise the situation was that bad, Jecel Assumpcao Jr
      • RE: [oc] C to HDL? Didn't realise the situation was that bad, Paul McFeeters
      • Re: [oc] C to HDL? Didn't realise the situation was that bad, jdalton
      • [oc] C++ to HDLs? Thats fine for breakfast now give me a challenge for lunchtime, Paul McFeeters
      • Re: [oc] C++ to HDLs? Thats fine for breakfast now give me a challenge for lunchtime, Michael Ayton
      • Re: [oc] C++ to HDLs? Thats fine for breakfast now give me a challenge for lunchtime, David I. Lehn
      • RE: [oc] C++ to HDLs? Thats fine for breakfast now give me a challenge for lunchtime, Paul McFeeters
      • Re: [oc] C++ to HDLs? Thats fine for breakfast now give me a challenge for lunchtime, Jim Dempsey
      • Re: [oc] C++ to HDLs? Thats fine for breakfast now give me a challenge for lunchtime, David I. Lehn
      • Re: [oc] C++ to HDLs? Thats fine for breakfast now give me a challenge for lunchtime, Jim Dempsey
    • Re: [oc] C to HDL? Didn't realise the situation was that bad, jdalton
      • [oc] Reinventing the wheel. Lets make it a sphere this time!, Paul McFeeters
  • Re: [oc] C to HDL? Didn't realise the situation was that bad, MICHAEL M DELANEY
• [oc] Idea: V.92 modem, Matts Kivik
  • Re: [oc] Idea: V.92 modem, Dennis Kaliher
  • Re: [oc] Idea: V.92 modem, Steve Wilson
  • [oc] C to HDL? Didn't realise the situation was that bad, Paul McFeeters
    • RE: [oc] C to HDL? Didn't realise the situation was that bad, Peekay Chan
      • Re: [oc] C to HDL? Didn't realise the situation was that bad, Sheldon Winter
      • [oc] I'm laughing so much its hurts,, Paul McFeeters
      • Re: [oc] I'm laughing so much its hurts,, Jim Dempsey
    • Re: [oc] C to HDL? Didn't realise the situation was that bad, Jim Dempsey
      • [oc] Commas? Concurrent execution in standard C?, Paul McFeeters
      • Re: [oc] Commas? Concurrent execution in standard C?, Tobin Fricke
      • RE: [oc] Commas? Concurrent execution in standard C?, Paul McFeeters
      • RE: [oc] Commas? Concurrent execution in standard C?, Tobin Fricke
      • Re: [oc] Commas? Concurrent execution in standard C?, Johan Klockars
      • Re: [oc] Commas? Concurrent execution in standard C?, Mohammed El Shoukry
      • Re: [oc] Commas? Concurrent execution in standard C?, Jim Dempsey
      • Re: [oc] Commas? Concurrent execution in standard C?, Jim Dempsey
      • RE: [oc] C to HDL? Didn't realise the situation was that bad, Paul McFeeters
  • <Possible follow-up(s)>
  • Re: [oc] Idea: V.92 modem, Matts Kivik
• ??: [oc] FPGA/ASIC Design Kits, WuYong
  • RE: [oc] FPGA/ASIC Design Kits, Paul McFeeters
• [oc] Re: How to creat such signal wave using VHDL?, zeyaohan
  • RE: [oc] Re: How to create such signal wave using VHDL?, Paul McFeeters
  • <Possible follow-up(s)>
  • [oc] Re: How to creat such signal wave using VHDL?, Martin.J Thompson
    • RE: [oc] Re: How to create such signal wave using VHDL?, Paul McFeeters
      • RE: [oc] Re: How to create such signal wave using VHDL?, Ramakrishna Rayaprolu
      • RE: [oc] Re: How to create such signal wave using VHDL?, Paul McFeeters
      • Re: [oc] Re: How to create such signal wave using VHDL?, Marko Mlinar
      • RE: [oc] Re: How to create such signal wave using VHDL?, Paul McFeeters
      • Re: [oc] Re: How to create such signal wave using VHDL?, Marko Mlinar
      • RE: [oc] Re: How to create such signal wave using VHDL?, Paul McFeeters
      • RE: [oc] Re: How to create such signal wave using VHDL?, Sam Gladstone
      • RE: [oc] Re: How to create such signal wave using VHDL?, Paul McFeeters
      • Re: [oc] Re: How to create such signal wave using VHDL?, David I. Lehn
      • [oc] cores list is becoming full of crap, Igor Mohor
      • [oc] Legal projects that can be worked on., Sam Gladstone
      • Re: [oc] Legal projects that can be worked on., Damjan Lampret
      • RE: [oc] Legal projects that can be worked on., Sam Gladstone
      • Re: [oc] Legal projects that can be worked on., Miha Dolenc
      • Re: [oc] Legal projects that can be worked on., Philipp Krause
      • RE: [oc] Legal projects that can be worked on., Sam Gladstone
      • RE: [oc] Legal projects that can be worked on., Vladimir Dergachev
      • RE: [oc] Legal projects that can be worked on., Sam Gladstone
      • Re: [oc] Legal projects that can be worked on., John Dalton
      • RE: [oc] Legal projects that can be worked on., Sam Gladstone
      • Re: [oc] Legal projects that can be worked on., Damjan Lampret
      • [oc] how to accomodate slower and faster modules in your design, Umair Farooq Siddiqi
      • [oc] Happy days ahead for flash, Paul McFeeters
• [oc] HDLC, ram
• [oc] HDLC & SDLC, ram
  • Re: [oc] HDLC & SDLC, Jamil Khatib
• [oc] FPGA/ASIC Design Kits, Mohammed El Shoukry
  • RE: [oc] FPGA/ASIC Design Kits, Igor Mohor
  • RE: [oc] FPGA/ASIC Design Kits, Paul McFeeters
    • RE: [oc] FPGA/ASIC Design Kits, Liao Choon Way
      • RE: [oc] FPGA/ASIC Design Kits, John Clark
      • RE: [oc] FPGA/ASIC Design Kits, Paul McFeeters
    • Re: [oc] FPGA/ASIC Design Kits, burched - tony burch
  • Re: [oc] FPGA/ASIC Design Kits, Jim Dempsey
    • RE: [oc] FPGA/ASIC Design Kits, Paul McFeeters
  • <Possible follow-up(s)>
  • RE: [oc] FPGA/ASIC Design Kits, Morris, Scott J
• Re: [oc] Reset signals? Oh okay, Reset signals? Oh okay, Resetsignals? Oh okay, Reset signals? Oh okay,, Martin.J Thompson
• [oc] Sequential processing in Verilog (was Sequential processing inVHDL? Whats the best way to do it?), Martin.J Thompson
  • [oc] Reset signals? Oh okay, Reset signals? Oh okay, Reset signals? Oh okay, Reset signals? Oh okay,, Paul McFeeters
• RE: [oc] Processor Instruction reply for Andreas, Morris, Scott J
  • Re: [oc] Processor Instruction reply for Andreas, Jim Dempsey
  • <Possible follow-up(s)>
  • RE: [oc] Processor Instruction reply for Andreas, Martin.J Thompson
    • RE: [oc] Processor Instruction reply for Andreas, Paul McFeeters
  • RE: [oc] Processor Instruction reply for Andreas, Martin.J Thompson
    • RE: [oc] Processor Instruction reply for Andreas, Paul McFeeters
• RE: [oc] Handel-C replacement, name is done now for thecoding., Martin.J Thompson
  • RE: [oc] Handel-C replacement, name is done now for thecoding., Paul McFeeters
• [oc] requesting project on asynchronous fifo using vhdl, abishek_sheik
• [oc] Regarding HDLC and SDLC, ram
• [oc] Regarding HDLC implementation, ram
  • Re: [oc] Regarding HDLC implementation, Jamil Khatib
• Re: [oc] Better VHDL tools anyone?, Martin.J Thompson
  • Re: [oc] Better VHDL tools anyone?, Jamil Khatib
• Re: [oc] Handel-C replacement, replacement name first methinks!, Martin.J Thompson
  • RE: [oc] Handel-C replacement, name is done now for the coding., Paul McFeeters
    • RE: [oc] Handel-C replacement, name is done now for the coding., Jamil Khatib
• Re: [oc] Sequential processing in VHDL? Whats the best way todo it?, Martin.J Thompson
  • RE: [oc] Sequential processing in VHDL? Whats the best way to do it?, Paul McFeeters
    • RE: [oc] Sequential processing in VHDL? Whats the best way to do it?, Paul McFeeters
  • <Possible follow-up(s)>
  • RE: [oc] Sequential processing in VHDL? Whats the best way todo it?, Martin.J Thompson
    • [oc] Martin,, Paul McFeeters
• Re: [oc] XNF or EDIF Format Details please, jdalton
  • Re: [oc] XNF or EDIF Format Details please, Steve Wilson
• Re: [oc] Re: mac, sanjeevmunji
  • Re: [oc] Re: mac, Paul Baxter
• [oc] VHDL help., Kausar Ahmed R
  • Re: [oc] VHDL help., MICHAEL M DELANEY
  • RE: [oc] VHDL help., Paul McFeeters
    • Re: [oc] VHDL help., Michael Ayton
      • [oc] Better VHDL tools anyone?, Paul McFeeters
      • Re: [oc] Better VHDL tools anyone?, John Clark
      • Re: [oc] Better VHDL tools anyone?, Jean Masson
      • Re: [oc] Better VHDL tools anyone?, Andras Tantos
  • Re: [oc] VHDL help., Andras Tantos
• RE: [oc] Sequential processing in VHDL? Whats the best way to do it?, Morris, Scott J
• RE: [oc] Any using VHDL procedures with Xilinx Webpack?, Olson, Gary
• Re: [oc] Has anybody won the lottery?, Martin.J Thompson
  • [oc] Handel-C replacement, replacement name first me thinks!, Paul McFeeters
  • <Possible follow-up(s)>
  • Re: [oc] Has anybody won the lottery?, Wamnet
• [oc] Thanks For Your Support Of Merlin, David Drummond
  • [oc] Sequential processing in VHDL? Whats the best way to do it?, Paul McFeeters
    • [oc] Re: Sequential processing in VHDL? Whats the best way to do it?, Andreas Bombe
  • Re: [oc] Thanks For Your Support Of Merlin, Jecel Assumpcao Jr
    • Re: [oc] Thanks For Your Support Of Merlin, Jim Dempsey
    • Re: [oc] Thanks For Your Support Of Merlin, Jim Dempsey
• [oc] Fwd: SPI Core & MP3, daniel.haensse
• [oc] SPI Core & MP3, Daniel Haensse
  • Re: [oc] SPI Core & MP3, Damjan Lampret
    • Re: [oc] SPI Core & MP3, Daniel Haensse
• Re: [oc] AES Implementation, u8913600
• RE: [oc] Re: Merlin Hybrid System, Dautel, Rob
  • Re: [oc] Re: Merlin Hybrid System, Jim Dempsey
    • RE: [oc] Re: Future of the Merlin Hybrid System, Paul McFeeters
      • Re: [oc] Re: Future of the Merlin Hybrid System, Jim Dempsey
  • [oc] Any using VHDL procedures with Xilinx Webpack?, Paul McFeeters
    • Re: [oc] Any using VHDL procedures with Xilinx Webpack?, Jim Dempsey
      • RE: [oc] Any using VHDL procedures with Xilinx Webpack?, Paul McFeeters
      • Re: [oc] Any using VHDL procedures with Xilinx Webpack?, Jim Dempsey
      • RE: [oc] Anyone using VHDL procedures with Xilinx Webpack?, Paul McFeeters
      • Re: [oc] Anyone using VHDL procedures with Xilinx Webpack?, Scott Zuk
      • RE: [oc] Anyone using VHDL procedures with Xilinx Webpack?, Paul McFeeters
      • RE: [oc] Anyone using VHDL procedures with Xilinx Webpack?, John Clark
    • Re: [oc] Any using VHDL procedures with Xilinx Webpack?, Michael Ayton
      • [oc] Has anybody won the lottery?, Paul McFeeters
      • [oc] What is Handel-C?, MICHAEL M DELANEY
  • IP type issues (was Re: [oc] Re: Merlin Hybrid System), John Dalton
    • [oc] Anybody prefer C to VHDL?, Paul McFeeters
      • Re: [oc] Anybody prefer C to VHDL?, Nanda
• RE: [oc] Floppy disk controller inside schematics wanted !, Dautel, Rob
  • Re: [oc] Floppy disk controller inside schematics wanted !, Jean Masson
    • RE: [oc] Floppy disk controller inside schematics wanted !, Paul McFeeters
• Re: [oc] file organization, karrarh
• Re: [oc] Video controller core, greenworm
• RE: [oc] CRC cores, Illan Glasner
• [oc] Merlin Hybrid System, David Drummond
  • [oc] Re: Merlin Hybrid System, Andreas Bombe
    • Re: [oc] Re: Merlin Hybrid System, Jim Dempsey
      • RE: [oc] Re: Merlin Hybrid System, Paul McFeeters
      • Re: [oc] Re: Merlin Hybrid System, Jim Dempsey
      • [oc] Re: Merlin Hybrid System, Andreas Bombe
      • Re: [oc] Re: Merlin Hybrid System, Steve Wilson
      • Re: [oc] Re: Merlin Hybrid System, Jim Dempsey
      • [oc] Re: Merlin Hybrid System, Andreas Bombe
      • [oc] XNF or EDIF Format Details please, Paul McFeeters
      • Re: [oc] XNF or EDIF Format Details please, Marko Mlinar
      • RE: [oc] XNF or EDIF Format Details please, Peekay Chan
      • RE: [oc] XNF or EDIF Format Details please, Paul McFeeters
      • Re: [oc] Re: Merlin Hybrid System, Jim Dempsey
      • [oc] Re: Merlin Hybrid System, Andreas Bombe
      • [oc] Verilog vs VHDL, brad
      • RE: [oc] Verilog vs VHDL, Paul McFeeters
      • Re: [oc] Re: Merlin Hybrid System, Jim Dempsey
      • Re: [oc] Re: Merlin Hybrid System, Jim Dempsey
      • Re: [oc] Re: Merlin Hybrid System, David Feustel
      • Re: [oc] Re: Merlin Hybrid System, Jim Dempsey
      • [oc] Intel Hyper-threading and CPU design, threads etc..., Paul McFeeters
      • Re: [oc] Intel Hyper-threading and CPU design, threads etc..., Jim Dempsey
      • [oc] Re: Intel Hyper-threading and CPU design, threads etc..., Andreas Bombe
      • [oc] Processor Instruction reply for Andreas, Paul McFeeters
      • Re: [oc] Processor Instruction reply for Andreas, Victor Snesarev
      • [oc] New 64bit instructions for 32bit processor cores analogy, Paul McFeeters
      • Re: [oc] New 64bit instructions for 32bit processor cores analogy, Daniel Haensse
      • RE: [oc] New 64bit instructions for 32bit processor cores analogy, Paul McFeeters
      • RE: [oc] New 64bit instructions for 32bit processor cores analogy, Jonathan D Bradbury
      • Re: [oc] New 64bit instructions for 32bit processor cores analogy, Steve Wilson
      • Re: [oc] New 64bit instructions for 32bit processor cores analogy, Damjan Lampret
      • Re: [oc] New 64bit instructions for 32bit processor cores analogy, Daniel Haensse
      • Re: [oc] New 64bit instructions for 32bit processor cores analogy, Victor Snesarev
      • RE: [oc] New 64bit instructions for 32bit processor cores analogy, Paul McFeeters
      • Re: [oc] New 64bit instructions for 32bit processor cores analogy, Rodolfo Jardim de Azevedo
      • Re: [oc] New 64bit instructions for 32bit processor cores analogy, Johan Klockars
      • Re: [oc] New 64bit instructions for 32bit processor cores analogy, Jim Dempsey
      • Re: [oc] Processor Instruction reply for Andreas, Rudolf Usselmann
      • RE: [oc] Processor Instruction reply for Andreas, Paul McFeeters
      • Re: [oc] Processor Instruction reply for Andreas, Rudolf Usselmann
      • Re: [oc] Processor Instruction reply for Andreas, Johan Klockars
      • [oc] Re: Processor Instruction reply for Andreas, Andreas Bombe
      • RE: [oc] Re: Processor Instruction reply for Andreas, Paul McFeeters
      • Re: [oc] Re: Processor Instruction reply for Andreas, Jim Dempsey
      • [oc] Re: Re: Processor Instruction reply for Andreas, Andreas Bombe
      • [oc] Multiple processors on one chip?, Paul McFeeters
      • RE: [oc] Re: Merlin Hybrid System, Paul McFeeters
      • Re: [oc] Re: Merlin Hybrid System, Jim Dempsey
      • [oc] Re: Merlin Hybrid System, Andreas Bombe
      • Re: [oc] Re: Merlin Hybrid System, Jim Dempsey
      • [oc] Re: Merlin Hybrid System, Andreas Bombe
      • Re: [oc] Re: Merlin Hybrid System, Jim Dempsey
  • [oc] CVS, web lottery, Paul McFeeters
    • Re: [oc] CVS, web lottery, Damjan Lampret
      • Re: [oc] CVS, web lottery, Nanda
      • Re: [oc] CVS, web lottery, Marko Mlinar
      • RE: [oc] CVS, web lottery FIXED, it could be you! lol, Paul McFeeters
      • RE: [oc] CVS, web lottery FIXED, it could be you! lol, Paul McFeeters
      • RE: [oc] CVS, web lottery FIXED, it could be you! lol, Richard Herveille
      • RE: [oc] CVS, web lottery FIXED, it could be you! lol, Paul McFeeters
      • [oc] Floppy disk controller inside schematics wanted !, Jean Masson
      • Re: [oc] CVS, web lottery, Richard Herveille
• [oc] [Fwd: CAN controller], Jamil Khatib
  • Re: [oc] [Fwd: CAN controller], Matthias Fuchs
• [oc] HDLC & SDLC difference, ram
  • Re: [oc] HDLC & SDLC difference, Steve Wilson
    • Re: [oc] HDLC & SDLC difference, Naveena Padmaraju
    • Re: [oc] HDLC & SDLC difference, Jamil Khatib